Knygos.lt nariams
Knygos.lt nariams
- Išsiųsime per 12–18 d.d.
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- Autorius: Ben Cohen
- Leidėjas: Kluwer Academic Publishers
- ISBN-10: 0792395980
- ISBN-13: 9780792395980
- Formatas: 17.8 x 25.4 x 2.2 cm, kieti viršeliai
- Kalba: Anglų
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Aprašymas
Preface. About the Disk. Notation Conventions. 1. VHDL Overview and Concepts. 2. Basic Language Elements. 3. Control Structures. 4. Drivers. 5. VHDL Timing. 6. Elements of Entity/Architecture. 7. Subprograms. 8. Packages. 9. User Defined Attributes, Specifications, and Configurations. 10. Functional Models and Testbenches. 11. UART Project. 12. Vital. 13. Design for Synthesis. Appendix A: VHDL'93 and VHDL'87 Syntax Summary. Appendix B: Package Standard. Appendix C: Package Textio. Appendix D: Package STD_Logic_1164. Appendix E: VHDL Preferred Attributes. Index.
- Autorius: Ben Cohen
- Leidėjas: Kluwer Academic Publishers
- ISBN-10: 0792395980
- ISBN-13: 9780792395980
- Formatas: 17.8 x 25.4 x 2.2 cm, kieti viršeliai
- Kalba: Anglų
Preface. About the Disk. Notation Conventions. 1. VHDL Overview and Concepts. 2. Basic Language Elements. 3. Control Structures. 4. Drivers. 5. VHDL Timing. 6. Elements of Entity/Architecture. 7. Subprograms. 8. Packages. 9. User Defined Attributes, Specifications, and Configurations. 10. Functional Models and Testbenches. 11. UART Project. 12. Vital. 13. Design for Synthesis. Appendix A: VHDL'93 and VHDL'87 Syntax Summary. Appendix B: Package Standard. Appendix C: Package Textio. Appendix D: Package STD_Logic_1164. Appendix E: VHDL Preferred Attributes. Index.
Atsiliepimai