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Veriloga (R) QuickStart
Veriloga (R) QuickStart
Knygos.lt klubas Knygos.lt nariams
150,91 €
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Įprastai
215,59 €
  • Išsiųsime per 12–18 d.d.
List of Figures. List of Examples. List of Tables. 1. Introduction. 2. Introduction to the VERILOG Language. 3. Structural Modeling. 4. Behavioral Modeling. 5. Operators. 6. Working with Behavioral Modeling. 7. User-Defined Primitives. 8. Parameterized Modules. 9. State Machines. 10. Modeling Tips. 11. Modeling Style Trade-offs. 12. Test Benches and Test Management. 13. Common Errors. 14. Debugging a Design. Appendix A: Gate Level Details. Appendix B: Example Summary. Index.

Veriloga (R) QuickStart (el. knyga) (skaityta knyga) | James M Lee | knygos.lt

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List of Figures. List of Examples. List of Tables. 1. Introduction. 2. Introduction to the VERILOG Language. 3. Structural Modeling. 4. Behavioral Modeling. 5. Operators. 6. Working with Behavioral Modeling. 7. User-Defined Primitives. 8. Parameterized Modules. 9. State Machines. 10. Modeling Tips. 11. Modeling Style Trade-offs. 12. Test Benches and Test Management. 13. Common Errors. 14. Debugging a Design. Appendix A: Gate Level Details. Appendix B: Example Summary. Index.

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List of Figures. List of Examples. List of Tables. 1. Introduction. 2. Introduction to the VERILOG Language. 3. Structural Modeling. 4. Behavioral Modeling. 5. Operators. 6. Working with Behavioral Modeling. 7. User-Defined Primitives. 8. Parameterized Modules. 9. State Machines. 10. Modeling Tips. 11. Modeling Style Trade-offs. 12. Test Benches and Test Management. 13. Common Errors. 14. Debugging a Design. Appendix A: Gate Level Details. Appendix B: Example Summary. Index.

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